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Stefan Westerfeld
ffmpeg
Commits
b4104392
Commit
b4104392
authored
May 11, 2024
by
Rémi Denis-Courmont
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Plain Diff
lavu/riscv: CPU flag for fast misaligned accesses
parent
61ec7450
Changes
5
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5 changed files
with
8 additions
and
1 deletion
+8
-1
cpu.c
libavutil/cpu.c
+1
-0
cpu.h
libavutil/cpu.h
+1
-0
cpu.c
libavutil/riscv/cpu.c
+3
-0
cpu.c
libavutil/tests/cpu.c
+2
-1
checkasm.c
tests/checkasm/checkasm.c
+1
-0
No files found.
libavutil/cpu.c
View file @
b4104392
...
...
@@ -193,6 +193,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
{
"zba"
,
NULL
,
0
,
AV_OPT_TYPE_CONST
,
{
.
i64
=
AV_CPU_FLAG_RVB_ADDR
},
.
unit
=
"flags"
},
{
"zbb"
,
NULL
,
0
,
AV_OPT_TYPE_CONST
,
{
.
i64
=
AV_CPU_FLAG_RVB_BASIC
},
.
unit
=
"flags"
},
{
"zvbb"
,
NULL
,
0
,
AV_OPT_TYPE_CONST
,
{
.
i64
=
AV_CPU_FLAG_RV_ZVBB
},
.
unit
=
"flags"
},
{
"misaligned"
,
NULL
,
0
,
AV_OPT_TYPE_CONST
,
{
.
i64
=
AV_CPU_FLAG_RV_MISALIGNED
},
.
unit
=
"flags"
},
#endif
{
NULL
},
};
...
...
libavutil/cpu.h
View file @
b4104392
...
...
@@ -91,6 +91,7 @@
#define AV_CPU_FLAG_RVB_BASIC (1 << 7) ///< Basic bit-manipulations
#define AV_CPU_FLAG_RVB_ADDR (1 << 8) ///< Address bit-manipulations
#define AV_CPU_FLAG_RV_ZVBB (1 << 9) ///< Vector basic bit-manipulations
#define AV_CPU_FLAG_RV_MISALIGNED (1 <<10) ///< Fast misaligned accesses
/**
* Return the flags which specify extensions supported by the CPU.
...
...
libavutil/riscv/cpu.c
View file @
b4104392
...
...
@@ -52,6 +52,7 @@ int ff_get_cpu_flags_riscv(void)
struct
riscv_hwprobe
pairs
[]
=
{
{
RISCV_HWPROBE_KEY_BASE_BEHAVIOR
,
0
},
{
RISCV_HWPROBE_KEY_IMA_EXT_0
,
0
},
{
RISCV_HWPROBE_KEY_CPUPERF_0
,
0
},
};
if
(
__riscv_hwprobe
(
pairs
,
FF_ARRAY_ELEMS
(
pairs
),
0
,
NULL
,
0
)
==
0
)
{
...
...
@@ -76,6 +77,8 @@ int ff_get_cpu_flags_riscv(void)
if
(
pairs
[
1
].
value
&
RISCV_HWPROBE_EXT_ZVBB
)
ret
|=
AV_CPU_FLAG_RV_ZVBB
;
#endif
if
(
pairs
[
2
].
value
&
RISCV_HWPROBE_MISALIGNED_FAST
)
ret
|=
AV_CPU_FLAG_RV_MISALIGNED
;
}
else
#endif
#if HAVE_GETAUXVAL
...
...
libavutil/tests/cpu.c
View file @
b4104392
...
...
@@ -95,6 +95,7 @@ static const struct {
{
AV_CPU_FLAG_RVV_I64
,
"zve64x"
},
{
AV_CPU_FLAG_RVV_F64
,
"zve64d"
},
{
AV_CPU_FLAG_RV_ZVBB
,
"zvbb"
},
{
AV_CPU_FLAG_RV_MISALIGNED
,
"misaligned"
},
#endif
{
0
}
};
...
...
tests/checkasm/checkasm.c
View file @
b4104392
...
...
@@ -287,6 +287,7 @@ static const struct {
{
"RVVi64"
,
"rvv_i64"
,
AV_CPU_FLAG_RVV_I64
},
{
"RVVf64"
,
"rvv_f64"
,
AV_CPU_FLAG_RVV_F64
},
{
"RV_Zvbb"
,
"rv_zvbb"
,
AV_CPU_FLAG_RV_ZVBB
},
{
"misaligned"
,
"misaligned"
,
AV_CPU_FLAG_RV_MISALIGNED
},
#elif ARCH_MIPS
{
"MMI"
,
"mmi"
,
AV_CPU_FLAG_MMI
},
{
"MSA"
,
"msa"
,
AV_CPU_FLAG_MSA
},
...
...
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