• Rémi Denis-Courmont's avatar
    riscv: probe for Zbb extension at load time · 378d1b06
    Rémi Denis-Courmont authored
    Due to hysterical raisins, most RISC-V Linux distributions target a
    RV64GC baseline excluding the Bit-manipulation ISA extensions, most
    notably:
    - Zba: address generation extension and
    - Zbb: basic bit manipulation extension.
    Most CPUs that would make sense to run FFmpeg on support Zba and Zbb
    (including the current FATE runner), so it makes sense to optimise for
    them. In fact a large chunk of existing assembler optimisations relies
    on Zba and/or Zbb.
    
    Since we cannot patch shared library code, the next best thing is to
    carry a flag initialised at load-time and check it on need basis.
    This results in 3 instructions overhead on isolated use, e.g.:
    1:  AUIPC rd, %pcrel_hi(ff_rv_zbb_supported)
        LBU   rd, %pcrel_lo(1b)(rd)
        BEQZ  rd, non_Zbb_fallback_code
        // Zbb code here
    
    The C compiler will typically load the flag ahead of time to reducing
    latency, and can also keep it around if Zbb is used multiple times in a
    single optimisation scope. For this to work, the flag symbol must be
    hidden; otherwise the optimisation degrades with a GOT look-up to
    support interposition:
    1:  AUIPC rd, GOT_OFFSET_HI
        LD    rd, GOT_OFFSET_LO(rd)
        LBU   rd, (rd)
        BEQZ  rd, non_Zbb_fallback_code
        // Zbb code here
    
    This patch adds code to provision the flag in libraries using bit
    manipulation functions from libavutil: byte-swap, bit-weight and
    counting leading or trailing zeroes.
    378d1b06
Name
Last commit
Last update
..
Makefile Loading commit data...
cpu_common.c Loading commit data...